The present invention relates to an IC card equipped with a plurality of types of update capable memories which update the contents thereof at different processing speeds, and a memory control method therefor.
Conventionally, when information (hereinafter called the “data”) received from an information processing apparatus connected with an IC card is stored in a region of memories equipped in the IC card, the data is mainly stored in RAM (Random Access Memory) or in EEPROM (Electrically Erasable and Programmable Read-Only Memory).
When RAM is used to store data, the RAM provides a faster processing speed for updating stored data than EEPROM. However, since the RAM is a volatile semiconductor device, it must be continuously supplied with power for retaining data therein. While a battery may be used for supplying electric power to RAM, the powering of RAM with a battery arises a problem that when the lifetime of the battery expires so that the power supply to RAM is failed, data stored in the RAM will be lost.
When EEPROM is used for storing data, no electric power need to be supplied thereto for retaining stored data because the EEPROM is a non-volatile semiconductor device. However, the EEPROM is disadvantageous in that its processing speed for updating data stored therein is extremely lower as compared with that of RAM.
Therefore, a conventional IC card is equipped with RAM and EEPROM each having a memory capacity required for a particular application, and externally supplied with electric power required for executing processing associated with the IC card. The processing associated with the IC card is executed using data on the RAM. Data which should be held and ensured even after the completion of processing is transferred from the RAM to the EEPROM.
JP-A-8-77081 and JP-A-9-259029 describe a buffer
This is a Continuation of Application No. 09/970,774, filed Oct. 5, 2001, which is a Continuation of Application No. 09/293,766, filed Apr. 19, 1999, the entire disclosures of which are hereby incorporated by reference. memory, and an EEPROM.
The prior art techniques have the following problems to solve. A time required for the IC card to complete processing requested by the information processing apparatus is predominantly dependent on a processing time required to update data in the EEPROM. It is necessary to continuously power the IC card from the outside and maintain the connection of the IC card with the information processing apparatus until the IC card notifies the information processing apparatus that data in RAM or the buffer memory has been transferred to the EEPROM.